The invention pertains to a circuit arrangement for detecting horizontally directed motion of an edge in a television picture.
In conventional television-picture reproduction systems, successive fields are displayed on a screen using interlaced scanning. For so-called frame reproduction, two temporally adjacent fields one of which was delayed by the transmission time of a field are simultaneously presented on the screen by interleaving the lines of the two fields. FIG. 1a shows schematically three successive fields 8, 9 and 10 with scanning lines 1 to 7. FIG. 1b shows the frames 11 and 12 formed from those fields. The fields have a vertical edge 13 at which lines 1 to 7 change from a dark picture area 14 to a bright picture area 15. In the course of the scene, this edge 13 moves in the horizontal direction toward the right margin 16 of the picture, so that the edge 13 is in the location x1 of the first field at the time t.sub.1, in the location x.sub.2 of the second field at the time t.sub.2, and in the location x.sub.3 of the third field at the time t.sub.3. Since the locations x.sub.1, x.sub.2 and x.sub.3 in the three fields 8, 9 and 10 are shifted relative to each other, in the first frame 11 formed from the two fields 8 and 9, the edge-forming transitions at x.sub.1 are shifted relative to the edge-forming transitions at x.sub.2. In the display of a frame, the moving edges 13 of the fields thus become a blurred bar 13' whose width is equal to the distance between x.sub.2 and x.sub.1 and which, on close examination, has a serrate structure.
To reduce or eliminate such picture unsharpness caused by the comblike serrate structure at a moving edge, it is first necessary to detect the places of such motion blur in the television frame and to produce a position-dependent detection signal. Such motion detection can also be used for other frame-signal-processing purposes, such as frame reproduction at increased frame frequency, frame reproduction with noise elimination systems, or frame reproduction with cross-color reduction in the PAL standard.
German Patent Application No. P34 44 836 discloses a detection circuit which requires three field delay circuits of which at least two are connected in series. By a subtracter, the Line signals of every first and third field are locally compared, and if the signal contents disagree, an output signal is produced which, after formation of the absolute value, amplitude weighting, and passage through a further delay circuit, is outputted as a detection signal. That detection circuit requires a large amount of circuitry since each field delay circuit for temporarily storing the information of a field represents a memory circuit with considerable memory location requirements.